One Case a Day | China: Examination of Amendments to the Specification Beyond the Original Scope - Invalidation Decision No. 580694 (2024)

Case Introduction

This case involves the examination of whether amendments made solely to the specification exceed the original scope. Its related infringement litigation case is also quite representative, involving infringement comparison without physical products and calculation methods for damages. We will share that with you another time if we have the opportunity. Today, we focus on the invalidation request case for this patent.

In the invalidation request, the collegial panel, from the perspective of a person skilled in the art and in conjunction with the inventive concept, comprehensively analyzed whether the corresponding amendments exceeded the original scope and ultimately reached an affirmative conclusion. However, the unique aspects of this case are far from over.

Although the invalidation decision determined that the corresponding amendments exceeded the original scope, "however, since the content of the specification amendments exceeding the original scope does not affect the determination of the protection scope of the claims," the patent right was maintained as valid. This case answers a classic question: If amendments exceeding the original scope are only made to the specification, will it invalidate the patent? I believe everyone has seen the answer through this case.

The author would also like to ask a few more questions: 1. Since the error of exceeding the original scope has been determined, does it have no consequences at all (e.g., refusing the amendment, maintaining validity based on the granted text, etc.)? 2. How is the public notice function of the patent text guaranteed? 3. Does Article 33 of the Patent Law have any applicable preconditions (e.g., must be related to the claims)? 4. Based on the conclusion of this case, the answer to question 3 is negative. So, if the examination for exceeding the original scope has no preconditions, why didn't it achieve its corresponding legal consequences?

The Patent Law says: Article 33 is an invalidation provision. The Reexamination Board says: Most of the time it is, sometimes it isn't...

Case Information

• Application Number: 201610083873.2
• Invention Name: A V-BY-ONE Signal Processing Method and Device
• Grant Announcement Date: January 30, 2018
• Correction Announcement Date: March 22, 2024
• Invalidation Decision Number: No. 580694
• Case Number: 4W117891
• Decision Date: September 30, 2024

Key Points of the Case

The involved patent relates to a V-BY-ONE signal processing method and device in the field of image signal processing technology. The specification and drawings submitted on the filing date recorded the following content:

"[0025] As shown in Figure 1, a V-BY-ONE signal processing device disclosed by the present invention includes a V-BY-ONE source image signal transceiver module, an image cropping module, a cache control module, and a V-BY-ONE image signal output module, all set in a programmable logic device, as well as an external storage medium electrically connected to the cache control module."

"[0026] In the above embodiment, the V-BY-ONE source image signal transceiver module is used to receive V-BY-ONE source image signals and parse them to obtain a recovered clock and image data; the image cropping module is used to perform cropping processing on the image data according to control signals to obtain valid image data; the external storage medium is used to store the valid image data to obtain stored data; the cache control module is used to implement reading and writing of data to the external storage medium; the V-BY-ONE image signal output module is used to read the stored data according to the output signal refresh rate and encode the read stored data according to the V-BY-ONE protocol based on the recovered clock to obtain V-BY-ONE image signals."

"[0030] 10K Module Detection Embodiment:"

"[0031] As shown in Figure 3, using a V-BY-ONE signal source with a resolution of 5120x2160 and a 4-lane signal interface to provide image detection signals for a V-BY-ONE module with a resolution of 10240x4320 and a 64-lane signal interface, four V-BY-ONE signal processing devices can work in parallel to process the V-BY-ONE image signals."

"[0032] In the above embodiment, the V-BY-ONE signal source allocates 4-lane V-BY-ONE source image signals to the four V-BY-ONE signal processing devices respectively, and uses an IIC interface to allocate control signals to the four V-BY-ONE signal processing devices respectively. After the V-BY-ONE signal processing devices are powered on, the V-BY-ONE signal source initializes the four V-BY-ONE signal processing devices and issues control information based on the module information of the V-BY-ONE module. The control information includes resolution 10240x4320, refresh rate 60Hz, cross cropping mode, and valid image area, where the valid image area of V-BY-ONE signal processing device 1 corresponds to area 1 in the drawing, V-BY-ONE signal processing device 2 corresponds to area 2, V-BY-ONE signal processing device 3 corresponds to area 3, and V-BY-ONE signal processing device 4 corresponds to area 4."

"[0033] In the above embodiment, the signal processing process of the V-BY-ONE signal processing device after initialization is completed is as follows:"

"[0034] (1) The V-BY-ONE signal source sends 4-lane 10K V-BY-ONE source image signals to the four V-BY-ONE signal processing devices respectively;"

"[0035] (2) The four V-BY-ONE signal processing devices parse the V-BY-ONE source image signals respectively, generating recovered clocks and image data;"

"[0036] (3) The four V-BY-ONE signal processing devices perform cropping processing on the image data according to the control information respectively, obtaining image data corresponding to the valid image area;"

"[0037] (4) The four V-BY-ONE signal processing devices send the image data of the valid image area into the DDR cache chip for caching respectively;"

"[0038] (5) The four V-BY-ONE signal processing devices read 16-lane image data from the DDR cache at a refresh rate of 60Hz respectively;"

"[0039] (6) The four V-BY-ONE signal processing devices encode the read 16-lane image data according to the V-BY-ONE protocol based on the recovered clock to obtain a total of 64-lane V-BY-ONE image signals."

After the patent was granted, the patentee, through a correction procedure, amended "10k" in paragraph [0034] of the application text specification to "5k"... The corrected granted text was re-announced in March 2024.

Controversial Focus

Whether the above amendment complies with the provisions of Article 33 of the Patent Law.

Views of the Parties

The requester argued: The inventive concept of this patent is to convert low refresh rate, low lane count V-BY-ONE source image signals into high refresh rate, high lane count V-BY-ONE image signals. For the 10K module detection embodiment in Figure 3, the V-BY-ONE signal source in Figure 3 is a 4-lane 10K signal, and the entire image signal is input to V-BY-ONE signal processing devices 1-4 respectively. In processing devices 1-4, cropping processing is performed on the image data according to control signals to obtain valid images corresponding to areas 1-4 respectively. After processing by devices 1-4, four signals with a resolution of 5120x2160 are output, combined into the rightmost image with a resolution of 10240x4320.

The patentee argued: The signal source is a 10K image, input to four V-BY-ONE signal processing devices. Each signal processing device receives one-quarter of the entire image and processes that quarter. The images output by the four V-BY-ONE signal processing devices are combined to form a 10K image. Within V-BY-ONE signal processing devices 1-4, the image can be cropped again according to control signals. When the V-BY-ONE signal processing device "performs cropping processing on the image data according to the control signal to obtain valid image data," "cropping processing" is a judgment action. It first judges whether the image needs "cropping" and then processes it according to the actual situation. There are cases where valid image data is directly output for storage.

The Collegial Panel Pointed Out:

(III) Article 33 of the Patent Law

Article 33 of the Patent Law stipulates: An applicant may amend his or its patent application documents, but the amendment to an application for a patent for invention or utility model may not go beyond the scope of disclosure contained in the original description and claims, and the amendment to an application for a patent for design may not go beyond the scope of the original representation as shown in the drawings or photographs.

The amendment to an application for a patent for invention may not go beyond the scope of disclosure contained in the original description and claims. The scope of disclosure includes the content literally recorded in the original description and claims, and the content that can be directly and unambiguously derived by a person skilled in the art from the literal content of the original description and claims and the drawings of the description. When judging whether an amendment goes beyond the scope, one should stand from the perspective of a person skilled in the art, based on the technical information expressed as a whole in the original application documents, explore the true meaning of the originally submitted technical solution, and determine whether a person skilled in the art can directly and unambiguously determine it by reading the claims, description, and drawings.

According to the content recorded in the description, combined with Figures 1-4, it can be seen that for the multi-FPGA chip solution, in the prior art, an external clock line is used to make the reference clocks of each lane V-BY-ONE signal share the same source. To avoid using an external clock line, the inventive concept of this patent is to perform cropping processing and high-speed caching on V-BY-ONE source image signals, use the recovered clock as the reference clock for the output signal, and convert low refresh rate, low lane count V-BY-ONE source image signals into high refresh rate, high lane count V-BY-ONE image signals.

In the structural block diagram of the V-BY-ONE signal processing device in Figure 1, the V-BY-ONE signal processing device includes modules such as the V-BY-ONE source image signal transceiver module and the image cropping module. Both V-BY-ONE source image signals and control signals are input to the FPGA (i.e., the V-BY-ONE signal processing device). Among them, the V-BY-ONE source image signal is input to the V-BY-ONE source image signal transceiver module of the FPGA, which parses it to obtain the recovered clock and image data; the control signal (including image cropping mode information: cross cropping mode or vertical cropping mode) is input to the image cropping module, which is used to perform cropping processing on the image data according to the control signal to obtain valid image data; subsequently, the valid image data is stored, the stored data is read according to the output signal refresh rate, and the read stored data is encoded according to the V-BY-ONE protocol based on the recovered clock to obtain V-BY-ONE image signals.

In the 10K module detection embodiment in Figure 3, V-BY-ONE source image signals and control signals are input to V-BY-ONE signal processing devices 1-4 respectively. The valid image areas of the above four V-BY-ONE signal processing devices 1-4 correspond to area 1, area 2, area 3, and area 4 in Figure 3 respectively. Combined with the content disclosed in the V-BY-ONE signal processing device in Figure 1 and the relevant textual description, it can be determined that V-BY-ONE signal processing devices 1-4 all include an image cropping module, and the image cropping module performs cropping processing on the image data according to the control signal to obtain valid image data.

In summary, based on the records of the original specification and Figures 1-4, it can be directly and unambiguously determined that "cropping by area" occurs in the V-BY-ONE signal processing device, not in the signal source. When performing 10K module detection, the V-BY-ONE source image signal sent to the four V-BY-ONE signal processing devices in paragraph [0034] of the specification should be a 4-lane 10K V-BY-ONE source image signal... The four V-BY-ONE signal processing devices perform cropping processing on the image data according to the control information respectively, obtaining 5120x2160 image data corresponding to the valid image area.

Claim 1 states "performing cropping processing on the image data according to the control signal to obtain valid image data." "Cropping processing" is not a judgment action but requires performing cropping processing on the data obtained by parsing the source image signal according to the control signal to obtain valid image data. That is, "cropping processing" occurs in the V-BY-ONE signal processing device, not in the signal source. The patentee's arguments that "cropping by area" occurs in the signal source and that "cropping processing" in the V-BY-ONE signal processing device is a judgment action have no basis and are inconsistent with the aforementioned inventive concept of this patent.

Therefore, the patentee's amendment to paragraph [0034] of the application text specification went beyond the scope of disclosure contained in the original description and claims and does not comply with the provisions of Article 33 of the Patent Law.

In summary, the requester's argument that the specification amendment goes beyond the scope and does not comply with Article 33 of the Patent Law is established. However, since the content of the specification amendment exceeding the original scope does not affect the determination of the protection scope of the claims, the collegial panel makes the following examination decision.

Maintain the validity of Invention Patent No. 201610083873.2.